A Cache Design for a Security Architecture for Microprocessors (SAM)

Protecting software and data becomes more and more important, especially, when sensitive or expensive software is executed on remote hosts. This protection includes copy protection, prevention of disassembling, prevention of altering the program flow and protection of processed data. For personal computers protection is more focused on copy protection. However, providing extended security to prevent data and algorithm disclosure is very important to increase the acceptance for GRID computing. In this paper we present a cache design for a secure combined hardware and software architecture called SAM. For SAM, the cache provides transparent encryption/decryption and content verification using hash values. Additionally, the cache has to consider different memory views and protection levels as well as support for protected shared memory, a key feature of SAM.